Title :
A Miniature V-band 3-Stage Cascode LNA in 0.13/spl mu/m CMOS
Author :
Chieh-Min Lo ; Chin-Shen Lin ; Huei Wang
Author_Institution :
National Taiwan Univ., Taipei
Abstract :
A miniature V-band (50 to 75GHz) 3-stage cascode CMOS LNA implemented in 0.13mum bulk CMOS technology exhibits better than 20dB measured gain from 51 to 57.5GHz in 0.46mm2 die size. The minimum NF is 7.1dB at 56.8GHz. The P1dB is -22dBm, the IIP3 is -12dBm, and the total current is 33mA
Keywords :
CMOS integrated circuits; low noise amplifiers; 0.13 micron; 20 dB; 33 mA; 50 to 75 GHz; 7.1 dB; CMOS low noise amplifier; bulk CMOS technology; noise figure; CMOS process; CMOS technology; Character generation; Circuits; Coplanar waveguides; Frequency; MOS devices; MOSFETs; Semiconductor device measurement; Substrates;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696172
