Design and analysis of high power supply rejection CMOS bandgap voltage reference

In this paper, a high power supply rejection (PSR) CMOS bandgap circuit applied in RF receiver is presented. A precise and simple PSR model, useful for pencil and paper analysis is hereby developed for the circuit. By analyzing the model, the ways to improve the circuit´s performance of PSR in both low and high frequency domain are presented. The PSR of the circuit can reach 102 dB at low frequency and is more than 50 dB at high frequency. The proposed CMOS bandgap voltage reference has been implemented in Chartered 0.25-mum N-Well CMOS process.