DocumentCode
2569120
Title
Design of a novel voltage comparator circuitry based on trimming technique
Author
Zhao, Wanwan ; Feng, Quanyuan
Author_Institution
Southwest Jiaotong Univ., Chengdu
fYear
2007
fDate
22-25 Oct. 2007
Firstpage
538
Lastpage
541
Abstract
This paper proposes a novel voltage comparator circuitry based on trimming technique for boost DC-DC converter. The achievable P-channel turn-off current of the proposed boost DC-DC converter with voltage comparator circuitry is 5 mA -120 mA implemented in UMC 0.6 um BiCMOS 5V 2P2M P-sub Poly Gpx 175 process. It enjoys the practical use for its wide PVT (process, voltage, temperature), high accuracy, low parts-court and low power dissipation.
Keywords
BiCMOS integrated circuits; DC-DC power convertors; comparators (circuits); integrated circuit design; low-power electronics; BiCMOS process; P-channel turn-off current; boost DC-DC converter; current 5 mA to 120 mA; power dissipation; size 0.6 mum; trimming technique; voltage 5 V; voltage comparator circuitry design; Circuits; DC-DC power converters; Inductance; Low voltage; MOSFETs; Manufacturing; Microelectronics; Power dissipation; Regulators; Resistors;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location
Guilin
Print_ISBN
978-1-4244-1132-0
Electronic_ISBN
978-1-4244-1132-0
Type
conf
DOI
10.1109/ICASIC.2007.4415686
Filename
4415686
Link To Document