Design of PWM controller for monolithic boost converter

Author

Lirong Zhu ; Feng Quanyuan

Author_Institution

School of Information Science & technology, Southwest Jiaotong University, ChengDu, 610031, China

fYear

2007

fDate

22-25 Oct. 2007

Firstpage

660

Lastpage

663

Abstract

In the design of monolithic boost converter, it is difficult to design a fixed on-chip compensator to stabilize the converter system for a wide operation range. So the loop stability design for the monolithic boost converter becomes very challenging. In this paper, a PWM controller without error amplifier is investigated, and a PWM comparator is designed for it. It is demonstrated that this scheme facilitates the design of the loop-stability. The simulation results from HSPICE using UMC 0.6-mum BiCMOS process, verify the good functionality and performance of the circuit designed. Finally, the proposed method can also be widely utilized in switching-mode DC-DC converter.

Keywords

PWM power convertors; network synthesis; stability; HSPICE; PWM comparator; PWM controller design; UMC BiCMOS process; fixed on-chip compensator; loop stability design; monolithic boost converter; Current control; Driver circuits; Error correction; Feedback loop; Pulse width modulation; Pulse width modulation converters; Resonance; System-on-a-chip; Transfer functions; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2007. ASICON '07. 7th International Conference on

Conference_Location

Guilin

Print_ISBN

978-1-4244-1132-0

Electronic_ISBN

978-1-4244-1132-0

Type

conf

DOI

10.1109/ICASIC.2007.4415717

Filename

4415717