Title :
6.33mW MPEG audio decoding on a multimedia processor
Author :
Ueda, Yoshitaka ; Yamauchi, Hideki ; Mukuno, Mamoru ; Furuichi, Shinji ; Fujisawa, Mayumi ; Qiao, Fei ; Yang, Huazhong
Author_Institution :
SANY0 Electr., Gifu
Abstract :
Low-power implementation techniques are used in the multimedia processor to achieve MPEG audio decoding in 6.33mW with a 1.1V supply. Three techniques are employed: a parallel processing DSP; dynamic voltage control using a multi-power domain; and a conditional pre-charge flip-flop. The processor occupies 6.5times6.5mm2 in 0.15mum 6M CMOS
Keywords :
CMOS integrated circuits; audio coding; digital signal processing chips; flip-flops; low-power electronics; multimedia communication; parallel processing; 0.15 micron; 1.1 V; 6.33 mW; CMOS integrated circuit; MPEG audio decoding; conditional pre-charge flip-flop; dynamic voltage control; low-power implementation; multimedia processor; multipower domain; parallel processing DSP; Clocks; Decoding; Degradation; Digital audio players; Digital signal processing; Flip-flops; Hardware; Power dissipation; Power supplies; Signal processing;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696218
