Title :
A 1Tb/s 3W inductive-coupling transceiver for inter-chip clock and data link
Author :
Miura, Naruhisa ; Inoue, M. ; Niitsu, Kiichi ; Nakagawa, Yukihiro ; Tago, Masamoto ; Fukaishi, M. ; Sakurai, Takayasu ; Kuroda, Tadahiro
Author_Institution :
Keio Univ., Yokohama
Abstract :
A 1Tb/s 3W inter-chip transceiver transmits clock and data by inductive coupling at a clock rate of 1GHz and data rate of 1Gb/s per channel. 1024 data transceivers are arranged with a pitch of 30mum. The total layout area is 2mm2 in 0.18mum CMOS and the chip thickness is 10mum. 4-phase TDMA reduces crosstalk and the BER is <10minus;12. Bi-phase modulation is used to improve noise immunity, reducing power in the transceiver
Keywords :
CMOS integrated circuits; clocks; error statistics; time division multiple access; transceivers; 0.18 micron; 1 GHz; 1 Tbit/s; 3 W; BER; CMOS integrated circuit; TDMA; bi-phase modulation; data link; data transceivers; inductive-coupling transceiver; inter-chip clock link; noise immunity; Bit error rate; Circuits; Clocks; Crosstalk; Inductors; Optical signal processing; Power dissipation; Time division multiple access; Transceivers; Transmitters;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696223
