DocumentCode :
2569759
Title :
A 1.2 GHz high-speed 256-bit shift register LSI
Author :
Mori, H. ; Tsukuda, A. ; Nishimura, H. ; Takada, M. ; Kawakami, Y. ; Nonaka, T. ; Kaminishi, K.
Author_Institution :
OKI Electr. Ind. Co. Ltd., Tokyo, Japan
fYear :
1988
fDate :
6-9 Nov. 1988
Firstpage :
135
Lastpage :
138
Abstract :
The authors have developed a high-speed 256-bit shift register LSI intended for use in gigabit-rate signal storage applications in GaAs MESFET DCFL/SBFL (direct-coupled FET logic/superbuffer FET logic) circuits. This shift register has serial data input and serial data output composition, suitable for line memory usage. To attain both high-speed and low power characteristics, the authors used a serial-input-data to parallel-internal-data and parallel-internal-data to serial-output-data conversion system. The maximum clock rate under which this device can operate is 1.2 GHz. It has a low (1.2-W) power consumption from a single 2-V power supply.<>
Keywords :
III-V semiconductors; field effect integrated circuits; gallium arsenide; integrated logic circuits; large scale integration; shift registers; 1.2 GHz; 1.2 W; 2 V; 256 bit; GaAs; III-V semiconductors; MESFET DCFL/SBFL; data conversion system; direct-coupled FET logic; gigabit-rate signal storage applications; high-speed; line memory usage; low power characteristics; maximum clock rate; serial data input; serial data output; shift register LSI; single 2-V power supply; superbuffer FET logic; Clocks; Energy consumption; FETs; Gallium arsenide; Large scale integration; Logic circuits; Logic devices; MESFET circuits; Power supplies; Shift registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1988. Technical Digest 1988., 10th Annual IEEE
Conference_Location :
Nashville, Tennessee, USA
Type :
conf
DOI :
10.1109/GAAS.1988.11042
Filename :
11042
Link To Document :
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