Novel CMOS second-generation current-controlled conveyor base on modified differential-pair input-stage

The modified CMOS differential-pair, containing only eight MOSFETs, is utilized to implement a second-generation current-controlled conveyor (CCCII) instead of the traditional translinear structure, which requires thirteen MOSFETs at least. Based on the AMS´s 0.35mum CMOS process, HSPICE simulations under the recommendation of plusmn1.5 V supply voltages provide the observation of good CCCII´s characteristics including of the maximum bias current of 140-muA related with the 350-MHz pole-frequency of the adjustable intrinsic transresistance at port X, and over 100-MHz of the reasonably exact performances of input and output stages. The lower supply voltages are also examined at plusmn 0.75 V and plusmn 0.5 V, which are able to operate with lower maximum bias current and pole-frequency.