DocumentCode

2569817

Title

Power-conscious High Level Synthesis Using Loop Folding

Author

Kim, Daehong ; Choi, Kiyoung

Author_Institution

Seoul National University, Seoul, Korea, 151-742

fYear

1997

fDate

9-13 June 1997

Firstpage

441

Lastpage

445

Keywords

Circuits; Concurrent computing; Costs; High level synthesis; Permission; Pipeline processing; Power dissipation; Power system reliability; Power systems; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1997. Proceedings of the 34th

Conference_Location

Anaheim, CA, USA

ISSN

0738-100X

Print_ISBN

0-7803-4093-0

Type

conf

DOI

10.1109/DAC.1997.597188

Filename

597188