DocumentCode
2569925
Title
A 14:1 dynamic MUX FF with select activity detection
Author
Sumita, M. ; Wada, Tomotaka
fYear
2006
fDate
6-9 Feb. 2006
Firstpage
1775
Lastpage
1784
Abstract
A 14:1 dynamic MUX FF is discussed. The design uses 2 cascaded dynamic stages to investigate the 14:1 MUX with a dynamic FF. In addition, replication is used to maintain latch state when all selects are inactive. The timing of the MUX FF is evaluated with a proposed slew detector. Fabricated in a 90nm CMOS process, the chip has a 2times speed increase and 70% area reduction compared to conventional methods
Keywords
CMOS logic circuits; flip-flops; 90 nm; CMOS process; dynamic MUX flip flop; select activity detection; slew detector; Circuit faults; Delay; Hazards; Logic circuits; MOS devices; Pipeline processing; Registers; Signal processing; Switches; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0079-1
Type
conf
DOI
10.1109/ISSCC.2006.1696234
Filename
1696234
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