DocumentCode
2570286
Title
A 1.2V Dual-Mode GSM/WCDMA - Modulator in 65nm CMOS
Author
Jarvinen, J. ; Halonen, Kari
Author_Institution
Helsinki Univ. of Technol., Espoo
fYear
2006
fDate
6-9 Feb. 2006
Firstpage
1972
Lastpage
1981
Abstract
A dual-mode DeltaSigma ADC for a GSM/WCDMA direct-conversion receiver is implemented in a standard 65nm digital CMOS process and has a core area of 0.1mm2. With sampling frequencies of 48MHz and 96MHz, the ADC achieves peak SNDRs of 84dB and 49dB over the 100kHz GSM band and 1.92MHz WCDMA band, respectively. It draws 2.75mA in GSM mode and 3mA in WCDMA mode from a 1.2V supply
Keywords
CMOS digital integrated circuits; analogue-digital conversion; cellular radio; code division multiple access; delta-sigma modulation; radio receivers; 1.2 V; 1.92 MHz; 2.75 mA; 3 mA; 65 nm; GSM; digital CMOS process; direct-conversion receiver; dual-mode delta-sigma analogue-digital conversion; wideband code division multiple access; Capacitors; Circuits; Clocks; Energy consumption; Feedback; GSM; Multiaccess communication; Sampling methods; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0079-1
Type
conf
DOI
10.1109/ISSCC.2006.1696255
Filename
1696255
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