Title :
The digital hardware design of the passive electron tag based on the protocol of ISO/IEC 14443-A
Author :
Junkai, Huang ; Guandong, Zheng
Author_Institution :
Jinan Univ., Guangzhou
Abstract :
Based on the protocol of ISO/IEC 14443-A, the digital hardware design of the passive electron tag and its functional test are developed taking into account the tag´s security of communication and information. The result shows that the design has a good optimization among the area, speed and power. Using 0.35 mum technology of Semiconductor Manufacturing International Corporation(SMIC), the chip area is 36877.750000 mum2, the power is 30.8458 mW, with the frequency of 13.56 MHz. In the meantime the technique indices on the protocol can be satisfied by our design.
Keywords :
IEC standards; ISO standards; digital circuits; identification technology; integrated circuit design; integrated circuit testing; security of data; ISO/IEC 14443-A protocol; communication security; digital hardware design; functional test; information security; passive electron tag; semiconductor manufacturing international corporation; tag security; Design optimization; Electrons; Frequency; Hardware; IEC standards; ISO standards; Information security; Protocols; Semiconductor device manufacture; Testing;
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
DOI :
10.1109/ICASIC.2007.4415794
