Title :
A 4GS/s 4b Flash ADC in 0.18/spl mu/m CMOS
Author :
Park, Sunghyun ; Palaskas, Yorgos ; Flynn, Michael P.
Author_Institution :
Michigan Univ., Ann Arbor, MI
Abstract :
A 0.18mum CMOS 4GS/s non-interleaved 4b flash ADC is presented. A comparator with a 32times32mum2 on-chip inductor extends sampling rate without extra power consumption. DAC trimming and comparator redundancy reduce DNL and INL to less than 0.15LSB and 0.24LSB, respectively. The measured ENOB is 3.84b and 3.48b at 3GS/s and 4GS/s, respectively. The ADC achieves a BER of less than 10-8
Keywords :
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); error statistics; inductors; 0.18 micron; 4 bit; CMOS integrated circuits; DAC trimming; comparator; flash analog-to-digital converter; on-chip inductor; Linearity; Solid state circuits;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696296
