Design and implementation of DFT strategy for an industrial communications and control SoC

With the development of microelectronics technology, IC has come into SoC age. At the same time, the increasing complexity of SoC design presents the test some challenging problems, such as IP, system integration, test strategy, and so on. A system level DFT solution for SoC is presented through a real life case (FF_SoC, 0.18 mu m, million gates chip). The SoC architecture is centered around ARM processor in combination with SRAM, PLL, uart, GPIO, watchdog timer, memory controller, real time clock, etc. The most important IP core is FFH1, which is a Foundation Fieldbus communications and control IP core designed by our team. In this paper we presented a structural and systematic DFT approach for SoCs.