Title :
A Spur Suppression Technique for Phase-Locked Frequency Synthesizers
Author :
Lee, Tai-Cheng ; Lee, Wei-Liang
Author_Institution :
National Taiwan Univ., Taipei
Abstract :
A 4.8GHz integer-N frequency synthesizer with distributed phase-frequency detectors and charge pumps moves spurious tones to higher frequencies and reduces the spur levels. PPM is used to relax the analog circuit accuracy requirement. The circuit is fabricated in a 0.18mum CMOS technology, dissipates 18mW from a 1.8V supply and suppresses sidebands by 10dB
Keywords :
CMOS integrated circuits; detector circuits; frequency synthesizers; interference suppression; phase locked loops; 0.18 micron; 1.8 V; 18 mW; 4.8 GHz; CMOS technology; analog circuit; charge pumps; distributed phase-frequency detectors; phase-locked frequency synthesizers; spur suppression; Charge pumps; Delay effects; Delay lines; Error correction; Frequency synthesizers; Phase frequency detector; Phase locked loops; Pulse modulation; Voltage control; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696307
