DocumentCode
2571640
Title
Thyristor-Based Volatile Memory in Nano-Scale CMOS
Author
Roy, Rich ; Nemati, Farid ; Young, Ken ; Bateman, Bruce ; Chopra, Rajesh ; Jung, Seong-Ook ; Show, Chiming ; Cho, Hyun-Jin
Author_Institution
T-RAM Semicond., San Jose, CA
fYear
2006
fDate
6-9 Feb. 2006
Firstpage
2612
Lastpage
2621
Abstract
A thyristor-based memory cell technology provides SRAM-like performance at 2times to 3times the density of conventional 6T SRAM. The technology is readily embedded into conventional nano-scale CMOS and scales into future SOI and FinFET technologies. A 19mm2 0.13mum 9Mb SOI test chip has a 0.562mum2 cell with a cell-R/W time <2ns
Keywords
CMOS memory circuits; SRAM chips; nanoelectronics; thyristors; 0.13 micron; 9 MByte; FinFET technologies; SOI test chip; SRAM-like performance; nanoscale CMOS; thyristor-based volatile memory; CMOS technology; Capacitors; FinFETs; Nanoscale devices; Performance gain; Random access memory; Read-write memory; Scalability; Thyristors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0079-1
Type
conf
DOI
10.1109/ISSCC.2006.1696327
Filename
1696327
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