A 20 GHz silicon microwave monolithic integrated circuits process and a 7.4 GHz frequency divider

Author

Miyazaki, S. ; Takai, C. ; Eguchi, K. ; Nakata, T.

Author_Institution

NEC Corp., Kawasaki, Japan

fYear

1989

fDate

13-15 June 1989

Firstpage

1065

Abstract

The authors demonstrate a DNP-III (direct nitride passivated III) process for microwave Si bipolar transistors without self-aligned structures. Using this process, n-p-n transistors with 0.06- mu m-wide and 0.1- mu m-deep emitter achieved an f/sub T/ of 20 GHz. A maximum dividing frequency of 7.4 GHz at V/sub cc/=6 V was achieved for a 1/2 prescaler with a master-slave T-type flip-flop. In addition, n-p-n transistors formed by the SIC (selectively ion-implanted collector) technique in the DNP-III process achieved an f/sub T/ of 30 GHz.<>

Keywords

MMIC; bipolar integrated circuits; elemental semiconductors; frequency dividers; integrated circuit technology; passivation; scaling circuits; silicon; 1/2 prescaler; 20 GHz; 30 GHz; 7.4 GHz; DNP III process; SHF; SIC process; bipolar MMIC; direct nitride passivated III; elemental semiconductors; frequency divider; master-slave T-type flip-flop; maximum dividing frequency; microwave Si bipolar transistors; microwave monolithic integrated circuits; n-p-n transistors; selectively ion-implanted collector; Boron; Frequency conversion; Ion implantation; Microwave transistors; Monolithic integrated circuits; Noise measurement; Parasitic capacitance; Resistors; Semiconductor device measurement; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 1989., IEEE MTT-S International

Conference_Location

Long Beach, CA, USA

Type

conf

DOI

10.1109/MWSYM.1989.38906

Filename

38906