Title :
Low voltage TVS devices: design and fabrication
Author :
Urresti, J. ; Hidalgo, S. ; Flores, D. ; Roig, J. ; Rebollo, J. ; Millán, J.
Author_Institution :
Centro Nacional de Microclectronica, Bellaterra, Spain
Abstract :
This paper addresses the optimisation of advanced transient voltage suppressor (TVS) devices for integrated circuit (IC) protection against electrostatic discharge (ESD) by means of technological and electrical simulations. An N+PP+N+ bipolar technology for low voltage (less than 3.3 V) TVs has been designed by optimising the trade-off between voltage capability and leakage current.
Keywords :
avalanche breakdown; avalanche diodes; doping profiles; electrostatic discharge; leakage currents; optimisation; overvoltage protection; semiconductor device breakdown; semiconductor device measurement; semiconductor device models; surge protection; transients; 3.3 V; ESD; N+PP+N+ bipolar technology; PN junction avalanche breakdown voltage; TVs voltage capability; electrostatic discharge IC protection; leakage current; low voltage TVS optimisation; low voltage transient voltage suppressor devices; optimal doping profile; punchthrough diodes; Breakdown voltage; Clamps; Electrostatic discharge; Fabrication; Integrated circuit technology; Leakage current; Low voltage; Semiconductor devices; Surge protection; Surges;
Conference_Titel :
Semiconductor Conference, 2002. CAS 2002 Proceedings. International
Print_ISBN :
0-7803-7440-1
DOI :
10.1109/SMICND.2002.1105844
