DocumentCode
2572569
Title
Inductorless Design of Wireless CMOS Frontends
Author
Harjani, Ramesh ; Cai, Liuchun
Author_Institution
Univ. of Minnesota, Minneapolis
fYear
2007
fDate
22-25 Oct. 2007
Firstpage
1367
Lastpage
1370
Abstract
Inductors are used in RF design to extend the bandwidth by resonating out the load and/or parasitic capacitance. However, on-chip inductors are large and cannot be ported easily from one process to the next. Due to modern CMOS scaling, inductorless RF design is becoming possible. In this paper we describe a new methodology for designing the RF frontends necessary for the UWB 3.1GHz -10.6 GHz bandwidth in a 0.13 mum CMOS technology. To validate our design methodology two receiver RF frontends were designed; a traditional inductor based design and an inductorless design. A common-gate LNA transconductor is followed by a capacitive peaking LNA-mixer pair (CPLM). Simulation results show that a CPLM with the same bandwidth has better linearity, comparable noise figure and uses only 17 % more power. The silicon area savings for the inductorless LNA and I/Q mixers is roughly 90 % in comparison to traditional inductor based designs illustrating its compact size and improved portability.
Keywords
CMOS integrated circuits; MMIC amplifiers; MMIC mixers; integrated circuit design; low noise amplifiers; ultra wideband technology; RF design; capacitive peaking LNA-mixer pair; common-gate LNA transconductor; frequency 3.1 GHz to 10.6 GHz; inductorless design; on-chip inductors; parasitic capacitance; receiver RF frontends; size 0.13 micron; wireless CMOS frontends; Bandwidth; CMOS technology; Design methodology; Inductors; Linearity; Noise figure; Parasitic capacitance; Radio frequency; Silicon; Transconductors;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location
Guilin
Print_ISBN
978-1-4244-1132-0
Electronic_ISBN
978-1-4244-1132-0
Type
conf
DOI
10.1109/ICASIC.2007.4415891
Filename
4415891
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