Process- and geometry-scalable bipolar transistor and transmission line models for Si and SiGe MMICs in the 5-22 GHz range

Author

Voinigescu, S.P. ; Marchesan, D. ; Showell, J.L. ; Maliepaard, M.C. ; Cudnoch, M. ; Schumacher, M.G.M. ; Herod, M. ; Walkey, D.J. ; Babcock, G.E. ; Schvan, P. ; Hadaway, R.A.

Author_Institution

NORTEL, Ottawa, Ont., Canada

fYear

1998

fDate

6-9 Dec. 1998

Firstpage

307

Lastpage

310

Abstract

Statistical transistor and transmission line models are developed and verified on Si bipolar and SiGe HBT technologies through 22 GHz. Universal best/worst process files are defined using principal component analysis and verified on the high frequency performance of transistors, CML delay chains, 5.8 GHz cascode LNA (NF=2 dB, G=10 dB, P/sub diss/=9 mW) and broadband amplifier (G=9 dB, B/sub 3dB/=22 GHz, S/sub 11/<-20 dB, NF=6 dB, P/sub 1dB/=12.5 dBm, group delay ripple<8 ps).

Keywords

Ge-Si alloys; bipolar MMIC; delays; elemental semiconductors; heterojunction bipolar transistors; integrated circuit modelling; principal component analysis; semiconductor materials; silicon; statistical analysis; 10 dB; 2 dB; 22 GHz; 5.8 GHz; 6 dB; 9 dB; 9 mW; CML delay chains; HBT technologies; MMICs; Si; SiGe; best/worst process files; broadband amplifier; geometry-scalable bipolar transistor; group delay ripple; high frequency performance; principal component analysis; process-scalable bipolar transistor; statistical transistor models; transmission line models; Bipolar transistors; Circuit simulation; Conductivity; Germanium silicon alloys; Impedance; MMICs; Microstrip; Silicon germanium; Solid modeling; Transmission lines;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-4774-9

Type

conf

DOI

10.1109/IEDM.1998.746361

Filename

746361