DocumentCode :
2573276
Title :
Future directions for DRAM memory cell technology
Author :
Nitayama, A. ; Kohyama, Y. ; Hieda, K.
Author_Institution :
Microelectron. Eng. Lab., Toshiba Corp., Yokohama, Japan
fYear :
1998
fDate :
6-9 Dec. 1998
Firstpage :
355
Lastpage :
358
Abstract :
The development trend and concerns of cell technologies are reviewed, and future actions for DRAM cell and process module are discussed. The BEST cell and the BST cell are promising for giga bit era DRAM. The BEST cell has simple and robust processes, and the conventional capacitor dielectric film is available. The BST film development is the key to realizing giga bit era DRAM by using BST cell.
Keywords :
DRAM chips; VLSI; cellular arrays; dielectric thin films; memory architecture; BEST cell; BST cell; DRAM; capacitor dielectric film; giga bit era; memory cell technology; process module; Binary search trees; Capacitors; Costs; Dielectric films; Laboratories; Microelectronics; Random access memory; Robustness; Substrates; Thermal resistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-4774-9
Type :
conf
DOI :
10.1109/IEDM.1998.746373
Filename :
746373
Link To Document :
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