Improving gate oxide integrity (GOI) of a W/WNx/dual-poly Si stacked-gate by using wet-hydrogen oxidation in 0.14-/spl mu/m CMOS devices

Author

Ohnishi, K. ; Yamamoto, N. ; Uchino, T. ; Hanaoka, Y. ; Tsuchiya, R. ; Nonaka, Y. ; Tanabe, Y. ; Umezawa, T. ; Fukuda, N. ; Mitani, S. ; Shiba, T.

Author_Institution

Central Res. Lab., Hitachi Ltd., Tokyo, Japan

fYear

1998

fDate

6-9 Dec. 1998

Firstpage

397

Lastpage

400

Abstract

Highly reliable W/WNx/dual-polySi stacked-gate technology for fabricating 0.14-/spl mu/m CMOS devices was developed. This technology uses a unique wet-hydrogen (WH) oxidation for achieving gate edge recovery following dry etching. We eliminated gate leakage thoroughly while simultaneously suppressing boron (B) penetration in PMOS by precisely controlling WH oxidation conditions. This oxidation technology results in high-performance CMOS characteristics.

Keywords

CMOS integrated circuits; integrated circuit metallisation; oxidation; tungsten; tungsten compounds; 0.14 micron; CMOS device; H/sub 2/; W-WN-Si; W/WNx/dual-poly Si stacked gate technology; dry etching; gate oxide integrity; wet hydrogen oxidation; CMOS technology; Dielectrics; Dry etching; Electrodes; Hydrogen; Ion implantation; MOS devices; Oxidation; Tin; Ultra large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-4774-9

Type

conf

DOI

10.1109/IEDM.1998.746383

Filename

746383