DocumentCode
2573593
Title
Tetrahedral shaped recess channel HEMT with a floating quantum dot gate
Author
Shima, M. ; Sakuma, Y. ; Futatsugi, T. ; Awano, Y. ; Yokoyama, N.
Author_Institution
Fujitsu Ltd., Atsugi, Japan
fYear
1998
fDate
6-9 Dec. 1998
Firstpage
437
Lastpage
440
Abstract
For the first time in the world, we achieved, at 77 K, a transistor and memory operation of an FET structure which was grown in a tetrahedral-shaped recess (TSR-HEMT). This TSR-HEMT memory has a floating quantum dot (QD) gate at the bottom of the recess. Owing to the particular shape of the tetrahedral-shaped recess (TSR) structure, we were able to demonstrate that the charging of the floating QD gate can modulate the potential energy near the bottom by an amount of 9 meV and thus effectively modify the current. The measured I-V characteristics of the memory device clearly indicated a hysteresis at the sub-threshold gate bias region and a low power operation requiring write/erase voltages around only 1 V. The measured retention characteristics also showed that the device had a retention time of several minutes even at 100 K. We think that the TSR-HEMT is a promising structure for the use in future nanometer-scale microelectronics.
Keywords
high electron mobility transistors; low-power electronics; semiconductor quantum dots; 1 V; 77 K; I-V characteristics; floating quantum dot gate; low power operation; memory operation; nanometer-scale microelectronics; potential energy; retention time; sub-threshold gate bias region; tetrahedral shaped recess channel HEMT; write/erase voltages; FETs; HEMTs; Hysteresis; Nanoscale devices; Potential energy; Power measurement; Quantum dots; Shape; Time measurement; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-4774-9
Type
conf
DOI
10.1109/IEDM.1998.746392
Filename
746392
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