A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs

Author

Platzner, Marco ; Rinner, Bernhard ; Weiss, Rebecca

Author_Institution

Inst. for Tech. Inf., Graz Univ. of Technol., Austria

fYear

1995

fDate

25-27 Jan 1995

Firstpage

311

Lastpage

318

Abstract

The design of a specialized computer architecture for qualitative simulation is presented. Our interest focuses on the hardware design of an application-specific computer architecture which is composed of programmable processors (digital signal processors TMS320C40) and application-specific integrated circuits (FPGAs). Two design strategies are considered to improve the performance. Primitive functions are hardware-implemented using FPGAs (software/hardware migration). More complex functions are mapped onto a multi processor system formed by TMS320C40. This computer architecture is designed for the well known algorithm for qualitative simulation-QSIM. In this paper we present the design of a computer architecture for the constraint-check-function-a function of the QSIM kernel

Keywords

digital simulation; parallel architectures; special purpose computers; FPGAs; application-specific computer architecture; computer architecture; constraint-check-function; design strategies; distributed computer architecture; hardware design; multi-DSP; performance; qualitative simulation; Algorithm design and analysis; Application specific integrated circuits; Circuit simulation; Computational modeling; Computer architecture; Computer simulation; Digital signal processors; Field programmable gate arrays; Hardware; Signal design;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel and Distributed Processing, 1995. Proceedings. Euromicro Workshop on

Conference_Location

San Remo

Print_ISBN

0-8186-7031-2

Type

conf

DOI

10.1109/EMPDP.1995.389193

Filename

389193