Multiple gate oxide thickness for 2 GHz system-on-a-chip technologies

Multiple t/sub OX/ is thoroughly investigated for nitrogen-implanted gate oxides with the optimization of Q/sub BD/ and a demonstration of 2 GHz counters. Furnace growth at 800/spl deg/C, 850/spl deg/C, and 900/spl deg/C is compared with rapid-thermal-oxidation (RTO) at 1050/spl deg/C. A wide range of reduced growth rate, 20% to 80%, is achieved that meets the SIA road-map for the next few generations of the CMOS technology. Optimization of charge-to-breakdown (Q/sub BD/) is achieved through investigation of the nitrogen distribution profile in the oxide that is affected by the growth temperature, nitrogen implant dose, and post-oxidation anneals. 10/sup 15//cm/sup 2/ nitrogen dose results in a higher Q/sub BD/ as well as a tighter tail distribution of Q/sub BD/ than 5/spl times/10/sup 14//cm/sup 2/ nitrogen dose. The tight distribution of Q/sub BD/ is important for yield improvement. If the oxide is either grown or annealed at 900/spl deg/C, Q/sub BD/ is as good as the Q/sub BD/ of regular oxide without nitrogen. As an example of integration, 0.18-/spl mu/m CMOS devices with dual gate oxides of 3 nm and 4 nm are fabricated and characterized at 1.5, 1.8, and 2.5 V. Performance of divide-by-3 counters is evaluated with the consideration of parasitic RC delays, and the results are superior to the most recently published data. At room temperatures, the maximum toggle frequency (f/sub T/) is higher than 2 GHz for both 1.8 and 2.5 V operation, with a power dissipation of 3.4 /spl mu/W at 85/spl deg/C. To further reduce the power dissipation to 0.08 /spl mu/W, 1.5-V operation gives 1-GHz f/sub T/ also at 85/spl deg/C.