Author :
Ha, J.M. ; Park, J.W. ; Kim, W.S. ; Kikm, S.P. ; Song, W.S. ; Kim, H.S. ; Song, H.J. ; Fujihara, K. ; Kang, H.K. ; Lee, M.Y. ; Felch, S. ; Jeong, U. ; Goeckner, M. ; Shim, K.H. ; Kim, H.J. ; Cho, H.T. ; Kim, Y.K. ; Ko, D.H. ; Lee, G.C.
Author_Institution :
Semicond. R&D Center, Samsung Electron. Co. Ltd., Kyonggi, South Korea
Abstract :
A BF/sub 3/ Plasma doping (PLAD) process has been utilized in source/drain/gate and shallow S/D extension for high performance 0.18 /spl mu/m pMOSFET. Gate oxide reliability, drain current, and transconductance of the pMOSFET with BF/sub 3/ PLAD are remarkably improved compared to those of BF/sub 2/ ion implanted devices. Cobalt salicide formation is also compatible with the plasma doped S/D junction.
Keywords :
CMOS integrated circuits; MOSFET; boron compounds; integrated circuit reliability; integrated circuit technology; plasma materials processing; semiconductor device reliability; semiconductor doping; 0.18 micron; BF/sub 3/ plasma doped gate; BF/sub 3/ plasma doped source; CMOSFET; Co salicide formation; CoSi; F/sub 3/ plasma doped drain; Si:BF/sub 3/; drain current; gate oxide reliability; high performance pMOSFET; p-channel MOSFET; source/drain extension; transconductance; Boron; Cobalt; Degradation; Doping; Ion implantation; MOSFET circuits; Plasma devices; Plasma immersion ion implantation; Plasma sources; Silicon;
