A VLSI prototype for Hadamard transform with application to MPEG-4 part 10

This paper presents a VLSI prototype for the 2times2 Hadamard transform that is applied to the DC coefficients of the four 4times4 blocks of each chroma component as described in the MPEG-4 part 10 advanced video coding (AVC) standard. A VLSI prototype fir the quantization process that is accompanied with the transform operation is given as well. The implemented transform represents a level in the hierarchical transform adopted in the new AVC standard. The transform is computed using add operations only. This reduces the computational requirements of the design. The architecture is prototyped and simulated using ModelSim 5.4reg. It is synthesized using Leonardo Spectrumreg. The results show that the architecture satisfies the real-time constraints required by high definition television (HDTV)