Two-dimensional dopant profiling of deep submicron MOS devices by electron holography

We show that electron holography can be used to obtain high resolution two-dimensional maps of deep submicron CMOS structures. Our results can be summarized as follows. (1) We have directly mapped the 2D electrostatic potential distribution in MOS transistors down to 0.18 /spl mu/m in feature size, and hence delineated the source/drain areas with sub-10 nm spatial resolution. (2) By matching with process simulation, we show that subtle, but important effects, such as enhanced B loss from source/drain areas under sidewalls, can be revealed. (3) Our approach uses a standard field-emission TEM, requires no free parameters, and the results do not depend on the precise choice of experimental conditions.