Shared tungsten structures for FEOL/BEOL compatibility in logic-friendly merged DRAM

Shared tungsten structures are proposed to replace the conventional Si-based structures of commodity DRAMs, thereby enabling alignment with the Logic frontand back-end-of-line processes to achieve full compatibility for sub-quarter-micron merged DRAM-Logic devices. W-based damascene bit lines, storage capacitors, and contact plugs used in the memory cells can be shared as local interconnect lines and stacked via plugs in the Logic circuitry. Adopting bilayer (PVD+CVD) W can realize a 40-65% reduction in interconnect resistance, in addition to its optimal use in Ta/sub 2/O/sub 5/-dielectric full metal capacitors.