DocumentCode :
2576348
Title :
A Study of the Rheological Properties of Lead free Solder Paste formulations used for Flip-Chip Interconnection
Author :
Mallik, S. ; Ekere, N.N. ; Durairaj, R. ; Marks, A.E.
Author_Institution :
Sch. of Eng., Univ. of Greenwich at Medway, Chatham
fYear :
2007
fDate :
3-5 Oct. 2007
Firstpage :
165
Lastpage :
171
Abstract :
The market for solder paste materials in the electronics sector is very large and consists of material and equipment suppliers and end users. These materials are used to bond electronic components (e.g. flip-chip, BGA) to printed circuit boards (PCB´s) across a range of dimensions where the solder interconnects can be 50 microns to 1 mm in size. For materials suppliers, the trends in the market are towards environmentally friendly materials (e.g. lead-free solders) that can be used at ever-smaller dimension where the properties of the materials must ensure reliable product performance. Equipment suppliers, for example printing machine manufacturers, are continually updating their equipment characteristics to ensure better print yield of solder paste onto a PCB. Whilst the End Users must ensure that the combination of materials and equipment used will provide the required product quality in terms of reliable interconnection performance. This study concerns the rheological characterisation of different lead-free solder paste formulations used for flip-chip interconnections, and is made up of three parts. The first part deals with the measurement of rheological properties with three different measuring geometries, the second part looks into the effect of frequencies on oscillatory stress sweep measurements and the final part reports on the characterisation and comparison of three different lead-free solder paste formulations. The objective of the study is to investigate the rheological behaviour of the three lead-free solder paste formulations used for flip-chip interconnection. Our study shows that of the three plate geometries evaluated, the serrated parallel plate geometry was more effective in minimizing the wall-slip. Our results also show that for the oscillatory stress-sweep measurement, the linear visco-elastic region (LVR) is independent of frequency for the three solder paste formulations. The results also show how wall-slip effects can be minimized in rheol- ogical measurements of solder pastes. The paper also outlines how different rheological test methods can be used to characterise solder paste behaviours and useful guide for both paste manufacturers and process engineers implementing flip-chip assembly.
Keywords :
flip-chip devices; integrated circuit interconnections; printed circuit manufacture; rheology; solders; electronic components; flip-chip assembly; flip-chip interconnection; lead free solder paste formulations; linear visco-elastic region; oscillatory stress sweep measurements; paste manufacturers; print yield; printed circuit boards; process engineers; reliable interconnection performance; rheological measurements; rheological properties; rheological test methods; serrated parallel plate geometry; solder interconnects; solder paste behaviours; solder paste materials; wall-slip effects; Bonding; Consumer electronics; Environmentally friendly manufacturing techniques; Frequency measurement; Geometry; Integrated circuit interconnections; Lead; Materials reliability; Rheology; Stress measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Manufacturing Technology Symposium, 2007. IEMT '07. 32nd IEEE/CPMT International
Conference_Location :
San Jose, CA
ISSN :
1089-8190
Print_ISBN :
978-1-4244-1335-5
Electronic_ISBN :
1089-8190
Type :
conf
DOI :
10.1109/IEMT.2007.4417065
Filename :
4417065
Link To Document :
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