DocumentCode :
2576458
Title :
A parallel processor for neural networks
Author :
Danese, G. ; De Lotto, I. ; Leporati, F.
Author_Institution :
Dipt. di Inf. e Sistemistica, Pavia Univ., Italy
fYear :
1999
fDate :
3-5 Feb 1999
Firstpage :
89
Lastpage :
96
Abstract :
We present two different algorithms implemented through neural networks on a multiprocessor device. The parallel single-chip TI TMS32C80 Multimedia Video Processor (MVP). The goal of this experimentation is to test, on real problems, the performance of this powerful unit made up by one Master Risc Processor and by four Slave Digital Signal Processors (DSPs) and to evaluate its suitability to neural network applications. The first problem implemented is a typical classification algorithm in which the network recognises which points belong to different regions inside a 2D space. The second problem is more computationally heavy and consists of a network able to recognise `handwritten´ digits. The parallel version of the first algorithm, was also tested on a commercially available supercomputer
Keywords :
digital signal processing chips; multimedia systems; neural nets; parallel processing; classification algorithm; digital signal processors; multiprocessor device; neural networks; parallel processor; parallel single-chip TI TMS32C80 multimedia video processor; Classification algorithms; Computer networks; Digital signal processing; Digital signal processors; Handwriting recognition; Master-slave; Neural networks; Reduced instruction set computing; Signal processing algorithms; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing, 1999. PDP '99. Proceedings of the Seventh Euromicro Workshop on
Conference_Location :
Funchal
Print_ISBN :
0-7695-0059-5
Type :
conf
DOI :
10.1109/EMPDP.1999.746650
Filename :
746650
Link To Document :
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