DocumentCode
2576617
Title
Nanophotonic interconnection networks in multicore embedded computing
Author
Bergman, Keren
Author_Institution
Dept. of Electr. Eng., Columbia Univ., New York, NY
fYear
2009
fDate
12-14 Jan. 2009
Firstpage
6
Lastpage
7
Abstract
We develop a multilayer optical network simulation environment that uniquely captures physical nanoscale silicon photonic device models. The network-on-chip scalability and performance are evaluated in the context of device characteristics and associated energy consumption.
Keywords
embedded systems; multiprocessing systems; nanophotonics; network-on-chip; optical computing; optical interconnections; silicon; Si; device characteristics; energy consumption; multicore embedded computing; multilayer optical network simulation; nanophotonic interconnection networks; network-on-chip scalability; physical nanoscale silicon photonic device model; Computational modeling; Embedded computing; Multicore processing; Multiprocessor interconnection networks; Nanoscale devices; Network-on-a-chip; Nonhomogeneous media; Optical fiber networks; Scalability; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
IEEE/LEOS Winter Topicals Meeting Series, 2009
Conference_Location
Innsbruck
Print_ISBN
978-1-4244-2610-2
Electronic_ISBN
978-1-4244-2611-9
Type
conf
DOI
10.1109/LEOSWT.2009.4771628
Filename
4771628
Link To Document