DocumentCode
2577
Title
Evaluation of Thermal Annealing Before and After Formation of Gate Insulator Films by Extracting Trap Densities for SPC Poly-Si TFTs
Author
Kimura, Mizue ; Hiroshima, Yasushi
Author_Institution
Dept. of Electron. & Inf., Ryukoku Univ., Otsu, Japan
Volume
34
Issue
2
fYear
2013
fDate
Feb. 2013
Firstpage
256
Lastpage
258
Abstract
We have evaluated the effects of thermal annealing before formation of gate insulator films (preannealing) and thermal annealing after formation of gate insulator films (postannealing) by extracting trap densities for solid-phase crystallized poly-Si thin-film transistors. It is suggested that the preannealing densifies the poly-Si films and induces additional internal stress after the thermal oxidation of the gate insulator films. On the other hand, the postannealing also relieves the internal stress. These conflicting effects indicate that the order of the thermal annealing is very important to improve device performance.
Keywords
elemental semiconductors; internal stresses; oxidation; rapid thermal annealing; silicon; thin film transistors; SPC poly-silicon TFT; Si; gate insulator film formation; internal stress; post-annealing; solid-phase crystallized poly-silicon thin-film transistors; thermal annealing evaluation; thermal oxidation; trap density extraction; Annealing; Insulators; Internal stresses; Logic gates; Oxidation; Thin film transistors; Gate insulator film; poly-Si; solid-phase crystallization (SPC); thermal annealing; thin-film transistor (TFT); trap state;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2012.2230610
Filename
6407726
Link To Document