Towards Scalability and Reliability of Autonomic Systems on Chip

Autonomic Systems on Chip provision VLSI systems with the capabilities of self-organization, self-healing and self-optimization, thereby allowing them to adapt to their environment and improve their functionality through run-time learning. This paper presents our current status of work on autonomic SoC architectures, beginning with a robust, self-correcting processor data path architecture and progressing to reinforcement machine learning techniques for self-optimization and self-organization at run time. An outlook of our future work and upcoming challenges in regard to autonomic systems on chip is then presented as a basis for discussion at the SORT workshop, and with the organic computing community in general.