• DocumentCode
    2578260
  • Title

    Advances in selective etching for nano scale salicide fabrication

  • Author

    Chu, Ming Mao ; Chou, Jung-Hua

  • Author_Institution
    Eng. Sci. Dept., Nat. Cheng Kung Univ., Tainan, Taiwan
  • fYear
    2009
  • fDate
    2-5 June 2009
  • Firstpage
    162
  • Lastpage
    165
  • Abstract
    High temperature SPM based wet selective processing for multi-step NiPt silicide process on nanoscale CMOS structure with dual gate dense layout has been studied. The high temperature SPM process is found to have better etching selectivity between NiPt/TiN and nickel rich silicide (Ni2Si/Ni3Si2) and results in better sheet resistance (Rs) and uniformity compare to HCL based process. The high temperature SPM process window is effective for Pt and induces very low material loss. Thus, it is a better selective etching process for multi-step silicide process that can scale with the CMOS technology toward 22 nm node.
  • Keywords
    CMOS integrated circuits; etching; nanotechnology; nickel alloys; nickel compounds; platinum alloys; titanium compounds; CMOS technology; Ni2Si-Ni3Si2; NiPt-TiN; dual gate dense layout; high temperature SPM based wet selective processing; multistep NiPt silicide process; nanoscale CMOS structure; nanoscale salicide fabrication; nickel rich silicide; selective etching; sheet resistance; CMOS process; CMOS technology; Etching; Fabrication; Nanostructures; Nickel; Scanning probe microscopy; Silicides; Temperature; Tin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology Materials and Devices Conference, 2009. NMDC '09. IEEE
  • Conference_Location
    Traverse City, MI
  • Print_ISBN
    978-1-4244-4695-7
  • Electronic_ISBN
    978-1-4244-4696-4
  • Type

    conf

  • DOI
    10.1109/NMDC.2009.5167528
  • Filename
    5167528