DocumentCode
2578323
Title
VIS Analyzer: A Visual Assistant for VIS Verification and Analysis
Author
Jeong, Sehun ; Yoo, Junbeom ; Cha, Sungdeok
Author_Institution
Coll. of Info. & Comm., Korea Univ., Seoul, South Korea
fYear
2010
fDate
5-6 May 2010
Firstpage
250
Lastpage
254
Abstract
Formal verification plays an important role in demonstrating the quality of safety-critical systems such as nuclear power plants. We have used the VIS verification system to determine behavioral equivalence between two successive revisions in developing the KNICS RPS (Reactor Protection System) in Korea. The VIS accepts a high-level programming language Verilog as input, and its verification results contain valuable information about one reason of the failure. However the VIS offers no graphical interface, and partially displays relevant information necessary to understand the full verification scenario accurately. Many nuclear engineers and verification experts found the information insufficient, and it makes hard to the wide use of the VIS verification system in industry. This paper proposes the VIS Analyzer, a visual assistant for VIS verification and analysis, which can help nuclear engineers take full benefits of VIS without being overwhelmed by incomplete and low-level details. The VIS Analyzer automates the VIS verification processes such as equivalence checking and model checking, and displays the verification results in visual formats. We used a recent case study introduced in to demonstrate its effectiveness and usefulness.
Keywords
data analysis; formal verification; hardware description languages; nuclear engineering computing; nuclear power stations; safety-critical software; VIS analyzer; VIS verification; Verilog programming language; behavioral equivalence; equivalence checking; formal verification; model checking; nuclear power plants; reactor protection system; safety-critical systems; verification interacting with synthesis; visual assistant; Computational modeling; Computer languages; Displays; Distributed computing; Educational institutions; Formal verification; Hardware design languages; Inductors; Power generation; Software safety; VIS; VIS Analyzer; automation; formal verification; visualization;
fLanguage
English
Publisher
ieee
Conference_Titel
Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), 2010 13th IEEE International Symposium on
Conference_Location
Carmona, Seville
ISSN
1555-0885
Print_ISBN
978-1-4244-7083-9
Electronic_ISBN
1555-0885
Type
conf
DOI
10.1109/ISORC.2010.41
Filename
5479548
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