A 4-um/su 2/ Full-CMOS SRAM Cell Technology For 0.2-um High-performance Logic LSIs
Author :
Takao, Y. ; Sambonsugi, Y. ; Watanabe, K. ; Takatsuka, H. ; Karasawa, T. ; Kawamura, E. ; Hashimoto, K. ; Takagi, H. ; Inoue, F. ; Shimizu, H. ; Yamazaki, T. ; Goto, H. ; Sugii, T. ; Miyajima, M. ; Watanabe, K. ; Aoyama, K.
Author_Institution :
Fujitsu Limited
fYear :
1997
fDate :
10-12 June 1997
Firstpage :
11
Lastpage :
12
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 1997. Digest of Technical Papers., 1997 Symposium on
