• DocumentCode
    2578888
  • Title

    Manufacturable process for Si-SET fabrication

  • Author

    Joshi, Vishwanath ; Lee, Yen-Chun ; Orlov, Alexei O. ; Snider, Gregory L.

  • Author_Institution
    Dept. of Electr. Eng., Univ. of Notre Dame, Notre Dame, IN, USA
  • fYear
    2009
  • fDate
    2-5 June 2009
  • Firstpage
    9
  • Lastpage
    12
  • Abstract
    In this report, we describe the fabrication and experimental demonstration of Si single-electron transistor. The CMOS compatible process flow uses lithography, dry etching and chemical mechanical polishing. The fabricated device showed Coulomb blockade oscillations well above 150 K.
  • Keywords
    CMOS integrated circuits; Coulomb blockade; chemical mechanical polishing; elemental semiconductors; etching; lithography; silicon; single electron transistors; CMOS compatible process; Coulomb blockade oscillation; Si; Si-SET fabrication; chemical mechanical polishing; dry etching; lithography; manufacturable process; single-electron transistor; CMOS process; Dry etching; Fabrication; Lithography; Manufacturing processes; Plasma temperature; Rough surfaces; Single electron transistors; Surface roughness; Temperature control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology Materials and Devices Conference, 2009. NMDC '09. IEEE
  • Conference_Location
    Traverse City, MI
  • Print_ISBN
    978-1-4244-4695-7
  • Electronic_ISBN
    978-1-4244-4696-4
  • Type

    conf

  • DOI
    10.1109/NMDC.2009.5167564
  • Filename
    5167564
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2578888