Parallel multipliers for Quantum-Dot Cellular Automata

Author

Kim, Seong-Wan ; Swartzlander, Earl E., Jr.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA

fYear

2009

fDate

2-5 June 2009

Firstpage

68

Lastpage

72

Abstract

This paper explores the optimization of parallel multipliers for Quantum-Dot Cellular Automata. To reduce the complexity, multipliers are designed with quasi-modularity to accommodate large word sizes. The regular quasi-modular product method is used to make n times n multipliers using 4 (n/2 times n/2) modules. This may be continued with further decomposition to 16 (n/4timesn/4) modules, etc. The last two rows in Wallace or Dadda reduction trees are summed by an adder that is 3n/2 - 1 bits long to produce the final product. This design is constructed using coplanar layouts and compared with other QCA multipliers (bit-serial and array multipliers). The delay, area and complexity are compared for several different operand sizes using the QCADesigner simulator.

Keywords

adders; cellular automata; quantum dots; Dadda reduction trees; Wallace reduction trees; adder; coplanar layouts; parallel multipliers; quantum dot cellular automata; quasi-modular product method; quasi-modularity; Biological materials; CMOS technology; Cities and towns; Clocks; Electrons; Nanotechnology; Polarization; Quantum cellular automata; Quantum dots; USA Councils;

fLanguage

English

Publisher

ieee

Conference_Titel

Nanotechnology Materials and Devices Conference, 2009. NMDC '09. IEEE

Conference_Location

Traverse City, MI

Print_ISBN

978-1-4244-4695-7

Electronic_ISBN

978-1-4244-4696-4

Type

conf

DOI

10.1109/NMDC.2009.5167566

Filename

5167566