DocumentCode :
2579062
Title :
Virtual tree coherence: Leveraging regions and in-network multicast trees for scalable cache coherence
Author :
Jerger, Natalie D Enright ; Peh, Li-Shiuan ; Lipasti, Mikko H.
Author_Institution :
Dept of Electr. & Comp. Eng., Univ. of Wisconsin-Madison, Madison, WI
fYear :
2008
fDate :
8-12 Nov. 2008
Firstpage :
35
Lastpage :
46
Abstract :
Scalable cache coherence solutions are imperative to drive the many-core revolution forward. To fully realize the massive computation power of these many-core architectures, the communication substrate must be carefully examined and streamlined. There is tension between the need for an ordered interconnect to simplify coherence and the need for an unordered interconnect to provide scalable communication. In this work, we propose a coherence protocol, virtual tree coherence (VTC), that relies on a virtually ordered interconnect. Our virtual ordering can be overlaid on any unordered interconnect to provide scalable, high-bandwidth communication. Specifically, VTC keeps track of sharers of a coarse-grained region, and multicasts requests to them through a virtual tree, employing properties of the virtual tree to enforce ordering amongst coherence requests. We compare VTC against a commonly used directory-based protocol and a greedy-order protocol extended onto an unordered interconnect. VTC outperforms both of these by averages of 25% and 11% in execution time respectively across a suite of scientific and commercial applications on 16 cores. For a 64-core system running server consolidation workloads, VTC outperforms directory and greedy protocols with average runtime improvements of 31% and 12%.
Keywords :
integrated circuit interconnections; microprocessor chips; network routing; protocols; coarse-grained region; directory-based protocol; greedy-order protocol; in-network multicast trees; many-core architectures; scalable cache coherence; virtual tree coherence; virtually ordered interconnect; Broadcasting; Cache storage; Computer architecture; Floods; Power engineering and energy; Power engineering computing; Protocols; Runtime; Scalability; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microarchitecture, 2008. MICRO-41. 2008 41st IEEE/ACM International Symposium on
Conference_Location :
Lake Como
ISSN :
1072-4451
Print_ISBN :
978-1-4244-2836-6
Electronic_ISBN :
1072-4451
Type :
conf
DOI :
10.1109/MICRO.2008.4771777
Filename :
4771777
Link To Document :
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