DocumentCode
2580608
Title
A spread-spectrum clock generator using a capacitor multiplication technique
Author
Chen, Chao-Chyun ; Lee, Sheng-Chou ; Liu, Shen-Iuan
Author_Institution
Graduate Inst. of Electron. Eng., Taiwan Nat. Univ., Taipei, Taiwan
fYear
2005
fDate
15-16 Aug. 2005
Abstract
This paper presents a capacitor multiplication technique to reduce the required capacitance in the loop filter for a spread spectrum clock generator (SSCG). It has been fabricated to verify the proposed technique in a 0.35μm single-poly quadruple-metal CMOS process. Based on the proposed capacitor multiplication technique, an SSCG with the spread ratios of 0.375%, 0.75%, 1.125% and 1.5% is also presented.
Keywords
CMOS integrated circuits; capacitance; clocks; phase locked loops; spread spectrum communication; 0.35 micron; capacitor multiplication; loop filter; single-poly quadruple-metal CMOS process; spread spectrum clock generator; spread-spectrum clock generator; Capacitance; Capacitors; Charge pumps; Clocks; Filters; Frequency; Phase locked loops; Spread spectrum communication; Transfer functions; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging Information Technology Conference, 2005.
Print_ISBN
0-7803-9328-7
Type
conf
DOI
10.1109/EITC.2005.1544338
Filename
1544338
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