Design and synthesis of built-in self-testable two-dimensional discrete cosine transform circuits

Author

Kim, Han Bin ; Ha, Dong Sam

Author_Institution

Sun Microsyst. Inc., Palo Alto, CA, USA

fYear

2000

fDate

2000

Firstpage

3

Lastpage

7

Abstract

We present design of a two-dimensional (2-D) discrete cosine transform (DCT) circuit with built-in self-test (BIST) capability. After modifying an existing fast 2-D DCT algorithm to make it more flexible, we synthesized the data path and the controller using our high-level BIST synthesis tool and incorporated scan design in other modules. Our design achieves high fault coverage at small cost of area overhead and system performance degradation

Keywords

automatic test pattern generation; boundary scan testing; built-in self test; data compression; discrete cosine transforms; fault diagnosis; high level synthesis; image coding; image processing equipment; BIST; area overhead; built-in self-testable circuits; data path; fault coverage; high-level BIST synthesis tool; scan design; system performance degradation; two-dimensional discrete cosine transform; Algorithm design and analysis; Built-in self-test; Circuit faults; Circuit synthesis; Control system synthesis; Costs; Degradation; Discrete cosine transforms; System performance; Two dimensional displays;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International

Conference_Location

Arlington, VA

Print_ISBN

0-7803-6598-4

Type

conf

DOI

10.1109/ASIC.2000.880666

Filename

880666