Title :
On implementing a configware/software SAT solver
Author :
Reis, N.A. ; de Sousa, J.T.
Author_Institution :
INESC-ID/IST, Tech. Univ. of Lisbon, Lisboa, Portugal
Abstract :
This paper presents an implementation of the configware/software SAT solver proposed in de Sousa, Abramovici and da Silva (2001). This is the first actually implemented hardware accelerated solver that can dispense with instance-specific compilation, and is capable of handling SAT formulas of virtually any size.
Keywords :
computability; hardware-software codesign; reconfigurable architectures; SAT solver; configurable hardware; configware/software architecture; hardware accelerated solver; satisfiability; Application software; Circuits; Computer architecture; Computer science; Field programmable gate arrays; Hardware; Life estimation; Pipelines; Terminology; Testing;
Conference_Titel :
Field-Programmable Custom Computing Machines, 2002. Proceedings. 10th Annual IEEE Symposium on
Print_ISBN :
0-7695-1801-X
DOI :
10.1109/FPGA.2002.1106685
