• DocumentCode
    2581733
  • Title

    Customising floating-point designs

  • Author

    Gaffar, Altaf Abdul ; Luk, Wayne ; Cheung, Peter Y K ; Shirazi, Nabeel

  • Author_Institution
    Dept. of Comput., Imperial Coll., London, UK
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    315
  • Lastpage
    317
  • Abstract
    This paper describes a method for customising the representation of floating-point numbers that exploits the flexibility of reconfigurable hardware. The method determines the appropriate size of mantissa and exponent for each operation in a design, so that a cost function with a given error specification for the output relative to a reference representation can be satisfied. Currently our tool, which adopts an iterative implementation of this method, supports single- or double-precision floating-point representation as the reference representation. It produces customised floating-point formats with arbitrary-sized mantissa and exponent. Results show that, for calculations involving large dynamic ranges, our method can achieve significant hardware reduction and speed improvement with respect to a design adopting the reference representation.
  • Keywords
    floating point arithmetic; performance evaluation; reconfigurable architectures; customising; data representation; error specification; exponent; floating-point numbers; hardware reduction; iterative implementation; mantissa; reconfigurable designs; reconfigurable hardware; reference representation; speed improvement; Cost function; Design methodology; Design optimization; Dynamic range; Educational institutions; Hardware; Iterative methods; Libraries; Logic; Medical services;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines, 2002. Proceedings. 10th Annual IEEE Symposium on
  • Print_ISBN
    0-7695-1801-X
  • Type

    conf

  • DOI
    10.1109/FPGA.2002.1106698
  • Filename
    1106698