DocumentCode
2581755
Title
Mapping multi-mode circuits to LUT-based FPGA using embedded MUXes
Author
Courtney, Tim ; Turner, Richard ; Woods, Roger
Author_Institution
Programmable Syst. Lab., Queen´´s Univ., Belfast, UK
fYear
2002
fDate
2002
Firstpage
318
Lastpage
319
Abstract
For some systems, a general-purpose FPGA solution tends to be large and slow. A reconfigurable solution is smaller and faster but has a delay associated with the reconfiguration. In this paper, embedded MUXes are used to achieve the performance of reconfiguration without the time penalty. For a CRC circuit an area reduction of 93% compared to a general-purpose solution and a reduction of 17-34% compared to similar software compiled systems is achieved.
Keywords
field programmable gate arrays; logic design; multiplexing equipment; reconfigurable architectures; FPGA; delay; embedded MUXes; multi-mode circuits; performance of reconfiguration; reconfigurable; time penalty; Circuit synthesis; Cyclic redundancy check; Decoding; Delay; Digital signal processing; Field programmable gate arrays; Laboratories; Polynomials; Software systems; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 2002. Proceedings. 10th Annual IEEE Symposium on
Print_ISBN
0-7695-1801-X
Type
conf
DOI
10.1109/FPGA.2002.1106699
Filename
1106699
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