DocumentCode
2581757
Title
An embedded PowerPCTM SOC for test and measurement applications
Author
Blaner, B. ; Czenkusch, D. ; Devins, R. ; Stever, S.
Author_Institution
Microelectronics Div., IBM Corp., Essex Junction, VT, USA
fYear
2000
fDate
2000
Firstpage
204
Lastpage
208
Abstract
This paper presents an embedded PowerPC system-on-a-chip for test and measurement embedded control applications. The SOC provides a leap in performance and interconnection capability over previous embedded controllers in the application space. The chip is built around a 200 MHz IBM PowerPC 405TM CPU and IBM CoreConnectTM buses, with memory controllers for PC100 SDRAM, SRAM, flash, and ROM. A high degree of interconnection flexibility is achieved by integrating interfaces to a wide variety of communications media including 400 Mbps IEEE 1394, Ethernet 101100Mbps, RS/232, IrDA, I2C, SCP, and others. The challenges of implementing such a large SOC design are discussed, with a detailed consideration of design verification methodology
Keywords
application specific integrated circuits; computerised instrumentation; embedded systems; industrial property; microcontrollers; peripheral interfaces; 10 Mbit/s; 100 Mbit/s; 200 MHz; 400 Mbit/s; Ethernet; I2C; IBM CoreConnectTM buses; IEEE 1394; IrDA; PC100 SDRAM; RS/232; SCP; SOC; design verification methodology; embedded PowerPC; interconnection capability; Communication system control; Control systems; Ethernet networks; Power system interconnection; Random access memory; Read only memory; SDRAM; Semiconductor device measurement; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International
Conference_Location
Arlington, VA
Print_ISBN
0-7803-6598-4
Type
conf
DOI
10.1109/ASIC.2000.880702
Filename
880702
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