Low power VLSI prototype for motion tracking architecture

Author

Badawy, Wael ; Bayoumi, Magdy

Author_Institution

Dept. of Electr. & Comput. Eng., Calgary Univ., Alta., Canada

fYear

2000

fDate

2000

Firstpage

243

Lastpage

247

Abstract

This paper presents a low power VLSI prototype for a video object motion tracking architecture that can be used for very low bit rate online video applications. The architecture prototypes a 2D mesh-based video object motion tracking algorithm. It can be used as a building block for 2D mesh-based video object systems such as MPEG-4 and MPEG-7 systems. Moreover, the power consumption and the delay show that the prototype can be used in mobile online video applications

Keywords

CMOS digital integrated circuits; VLSI; application specific integrated circuits; digital signal processing chips; low-power electronics; motion compensation; motion estimation; parallel architectures; real-time systems; tracking; video signal processing; 0.6 micron; 2D mesh-based video object motion tracking algorithm; 2D mesh-based video object systems; ASIC; DSP chip; MPEG-4 systems; MPEG-7 systems; delay; low power VLSI prototype; mobile online video applications; motion tracking architecture; power consumption; very low bit rate online video applications; video object motion tracking; Computer architecture; Drives; Hardware; Mesh generation; Motion estimation; Prototypes; Tracking; Very large scale integration; Video sequences; Video signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International

Conference_Location

Arlington, VA

Print_ISBN

0-7803-6598-4

Type

conf

DOI

10.1109/ASIC.2000.880709

Filename

880709