Title :
Don´t-care identification on specific bits of test patterns
Author :
Miyase, Kohei ; Kajihara, Seiji ; Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Graduate Sch. of Comput. Sci. & Syst. Eng., Kyusyu Inst. of Technol., Japan
Abstract :
Given a test set for stuck-at faults, a primary input value may be changed to the opposite logic value without losing fault coverage. One can regard such a value as a don´t-care (X). The don´t care values can be filled appropriately to achieve test compaction, test data compression, or power reduction during testing. However, these uses are better served if the don´t cares can be placed in desired/specific bit positions of the test patterns. In this paper, we present a method for maximally fixing Xs on specific bits of given test vectors. Experimental results on ISCAS benchmark circuits show how the proposed method can increase the number of Xs on specific bits compared with an earlier proposed method.
Keywords :
automatic test pattern generation; logic testing; ISCAS benchmark circuits; don´t care values; don´t-care; maximally fixing Xs; power reduction; primary input value; stuck-at faults; test compaction; test set; test vector; Automatic test pattern generation; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Compaction; Computer science; Logic testing; Power dissipation; Test data compression;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
Print_ISBN :
0-7695-1700-5
DOI :
10.1109/ICCD.2002.1106769