• DocumentCode
    2582921
  • Title

    Impact of scaling on the effectiveness of dynamic power reduction schemes

  • Author

    Duarte, D. ; Vijaykrishnan, N. ; Irwin, M.J. ; Kim, H.-S. ; McFarland, G.

  • fYear
    2002
  • fDate
    2002
  • Firstpage
    382
  • Lastpage
    387
  • Abstract
    Power is considered to be the major limiter to the design of faster and more complex processors in the near future. In order to address this challenge, a combination of process, circuit design and micro-architectural changes are required Consequently, to focus optimization efforts in the right direction, the models proposed and studies performed in this work are a first step for understanding the relative importance of leakage and dynamic energy in future technologies. Further, we analyze the effectiveness of two energy reduction mechanisms that employ voltage scaling, namely, supply and threshold voltage selection. We consider the impact of imminent technology changes and packaging improvements while showing that neglecting the impact of temperature may lead to underestimating power savings by up to 19.5%.
  • Keywords
    CMOS integrated circuits; circuit optimisation; integrated circuit design; integrated circuit packaging; low-power electronics; power consumption; CMOS circuits; circuit design; dynamic energy; dynamic power reduction schemes; leakage; micro-architectural changes; optimization; packaging; power savings; processors; supply voltage selection; technology scaling impact; threshold voltage selection; voltage scaling; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
  • ISSN
    1063-6404
  • Print_ISBN
    0-7695-1700-5
  • Type

    conf

  • DOI
    10.1109/ICCD.2002.1106798
  • Filename
    1106798