DocumentCode
2583002
Title
The dynamic granularity memory system
Author
Yoon, Doe Hyun ; Jeong, Min Kyu ; Sullivan, Michael ; Erez, Mattan
fYear
2012
fDate
9-13 June 2012
Firstpage
548
Lastpage
560
Abstract
Chip multiprocessors enable continued performance scaling with increasingly many cores per chip. As the throughput of computation outpaces available memory bandwidth, however, the system bottleneck will shift to main memory. We present a memory system, the dynamic granularity memory system (DGMS), which avoids unnecessary data transfers, saves power, and improves system performance by dynamically changing between fine and coarse-grained memory accesses. DGMS predicts memory access granularities dynamically in hardware, and does not require software or OS support. The dynamic operation of DGMS gives it superior ease of implementation and power efficiency relative to prior multi-granularity memory systems, while maintaining comparable levels of system performance.
Keywords
multiprocessing systems; storage management; DGMS; OS support; chip multiprocessors; dynamic granularity memory system; memory access granularities; memory bandwidth; multi granularity memory systems; performance scaling; system bottleneck; Bandwidth; Error correction codes; Layout; Memory management; Random access memory; Registers; Strontium;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture (ISCA), 2012 39th Annual International Symposium on
Conference_Location
Portland, OR
ISSN
1063-6897
Print_ISBN
978-1-4673-0475-7
Electronic_ISBN
1063-6897
Type
conf
DOI
10.1109/ISCA.2012.6237047
Filename
6237047
Link To Document